1. Field of the Invention
The present invention relates to a semiconductor device including a semiconductor chip, a seal cap which is adhered to the semiconductor chip and includes a recess portion, and an air seal portion defined by the semiconductor chip and the recess portion of the seal cap, which is packaged into a chip size, and a method of manufacturing the semiconductor device.
2. Description of Related Art
Recently, the compact electronic device such as the cell phone and digital audio player has been increasingly demanded. Various parts to be built in the compact electronic device are required to be compact conforming to the trend of further reducing the size of the electronic device.
In consideration of the aforementioned trend, the electronic device represented by the solid image pickup device and the device using micro-electro-mechanical-system technology represented by the acceleration sensor (hereinafter referred to as MEMS device) have been under rapid development.
The chip size package (CSP), especially, the wafer level chip size package (WL-CSP) formed by adhering the substrate to be formed as the known cap to the semiconductor substrate that forms the element to be diced into the individual device has been increasingly developed.
For example, the wafer level chip size package includes a semiconductor wafer 230A having a plurality of MEMS devices 211A and semiconductor chips 210A with wiring formed thereon, and a cap array wafer 240A having a plurality of seal caps 220A as shown in FIG. 14. The wafer level chip size package is formed by adhering the semiconductor wafer 230A to the cap array wafer 240A as shown in FIG. 15 such that the MEMS devices 211A are sealed with the resultant cavities CV, respectively.
FIG. 14 is a view showing the state where the conventionally employed semiconductor wafer is placed opposite the cap array wafer. FIG. 15 is a view showing the state where the semiconductor wafer and the cap array wafer as shown in FIG. 14 are adhered.
Referring to FIG. 16, the semiconductor wafer 230A has a plurality of via-holes 213 each vertically formed from the back surface to be below the wiring on the upper surface of the semiconductor wafer 230A. The wiring on the upper surface is connected to a bump electrode 215 formed on the back surface via a buried electrode 214 formed in each of the via-holes 213. The adhered wafers 230A and 240A are diced along the scribe lines L and L′, respectively so as to produce a plurality of semiconductor devices each as an individual package.
FIG. 16 is a view showing a state where the via-holes, the buried electrode, and the bump electrode are formed on the semiconductor wafer shown in FIG. 15.
The thus produced semiconductor device and the method of manufacturing the semiconductor device are disclosed in Japanese Unexamined Patent Application Publication No. 2005-19966, for example.
The aforementioned method of manufacturing the semiconductor device as described above allows its manufacturing step to be simplified, thus reducing manufacturing cost of the package, making the package compact, and further improving the reliability.